A major challenge in maintaining quality and reliability in today's microelectronics chips comes from the ever increasing levels of integration in the device fabrication, as well as from the high current densities. Transient Joule heating in the on-chip interconnect metal lines with characteristic sizes of tens of nanometer, can lead to thermomechanical fatigue and failure due to the thermal expansion coefficient mismatch between different materials. Full-field simulations of nearly a billion interconnects in a modern microprocessor are infeasible due to the grid size requirements. To prevent premature device failures, a rapid predictive capability for the thermal response of on-chip interconnects is essential. This work develops a two-dimensional (2D) transient heat conduction framework to analyze inhomogeneous domains, using a reduced-order modeling approach based on proper orthogonal decomposition (POD) and Galerkin projection. POD modes are generated by using a representative step function as the heat source. The model rapidly predicted the transient thermal behavior of the system for several cases, without generating any new observations, and using just a few POD modes.
Transient Heat Conduction in On-Chip Interconnects Using Proper Orthogonal Decomposition Method
Massachusetts Institute of Technology,
Cambridge, MA 02139
Georgia Institute of Technology,
801 Ferst Drive,
Atlanta, GA 30306
Contributed by the Heat Transfer Division of ASME for publication in the JOURNAL OF HEAT TRANSFER. Manuscript received May 1, 2013; final manuscript received January 25, 2017; published online March 21, 2017. Assoc. Editor: Leslie Phinney.
Barabadi, B., Kumar, S., and Joshi, Y. K. (March 21, 2017). "Transient Heat Conduction in On-Chip Interconnects Using Proper Orthogonal Decomposition Method." ASME. J. Heat Transfer. July 2017; 139(7): 072101. https://doi.org/10.1115/1.4035889
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