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Proceedings Papers

Die Stress Analysis in Stacked Die Chip Scale Packages (SCSP)

Satish C. Chaparala, Frank E. Andros, Bill Infantolino, Bahgat G. Sammakia, Satish C. Guttikonda, Julia Zhao, Dipak Sengupta

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1397-1404, July 17–22, 2005

Paper No: IPACK2005-73085

DOI: https://doi.org/10.1115/IPACK2005-73085

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Topics: Stress analysis (Engineering), Stress, Fracture (Materials), Packaging, Wire, Cracking (Materials), Density, Design, Engineers, Finite element methods

Proceedings Papers

A Thermo-Viscoelastic Analysis and Reliability Evaluation for a Single-Sided CSP

Hideo Koguchi, Mirai Ishida, Kazuto Nishida, Tomoaki Kuroishi

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1405-1412, July 17–22, 2005

Paper No: IPACK2005-73096

DOI: https://doi.org/10.1115/IPACK2005-73096

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Topics: Deflection, Reliability, Stress, Viscoelasticity, Relaxation (Physics), Resins, Thermodynamic cycles, Adhesives, Thermal expansion, Thermal stresses

Proceedings Papers

Thermal Characterization of Pulse-Activated Microelectronic Devices by Thermoreflectance-Based Surface Temperature Scanning

Pavel L. Komarov, Mihai G. Burzo, Peter E. Raad

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1413-1420, July 17–22, 2005

Paper No: IPACK2005-73196

DOI: https://doi.org/10.1115/IPACK2005-73196

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Topics: Microelectronic devices, Temperature, Thermal characterization, Thermoreflectance, Reflectance, Silicon, Transients (Dynamics), MOSFET transistors, Resolution (Optics), Calibration

Proceedings Papers

Simplified Network Based Modeling of Cold Plate in a CFD Environment

Debabrata Pal, Mark Severson

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1421-1426, July 17–22, 2005

Paper No: IPACK2005-73202

DOI: https://doi.org/10.1115/IPACK2005-73202

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Topics: Computational fluid dynamics, Modeling, Flow (Dynamics), Electronics, Manufacturing, Plates (structures), Aerospace industry, Boundary-value problems, Design, Heat

Proceedings Papers

Modeling of Electron Transport in Thin Films With Quantum and Scattering Effects

A. Bulusu, D. G. Walker

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1427-1432, July 17–22, 2005

Paper No: IPACK2005-73212

DOI: https://doi.org/10.1115/IPACK2005-73212

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Topics: Electromagnetic scattering, Electron transport, Modeling, Radiation scattering, Scattering (Physics), Thin films, Equilibrium (Physics), Phonons, Dimensions, Electrons

Proceedings Papers

Solder Joint Reliability Prediction of Flip Chip Packages Under Shock Loading Environment

Wei Keat Loh, Luke J. Garner

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1433-1440, July 17–22, 2005

Paper No: IPACK2005-73213

DOI: https://doi.org/10.1115/IPACK2005-73213

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Topics: Flip-chip packages, Reliability, Shock (Mechanics), Solder joints

Proceedings Papers

A Characterization Study of Flip Chip Ball Grid Array (FCBGA) Dynamic Response and Performance on Peripheral Component Interconnect (PCI) Board Application

Shaw Fong Wong, Wei Keat Loh, Yung Hsiang Lee, Eng Hooi Yap, Siang Woen Wong, Tze Yang Hin

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1441-1447, July 17–22, 2005

Paper No: IPACK2005-73215

DOI: https://doi.org/10.1115/IPACK2005-73215

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Topics: Ball-Grid-Array packaging, Dynamic response, Flip-chip, Flip-chip devices, Fracture (Materials), Risk, Solder joints, Accelerometers, Computer software, Design

Proceedings Papers

Solder Joint Reliability Challenges in Sub 1.00 mm Ball Pitch for Flip Chip Ball Grid Array

Keh Shin Beh, Wei Keat Loh, Jenn Seong Leong, Wooi Aun Tan

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1449-1454, July 17–22, 2005

Paper No: IPACK2005-73216

DOI: https://doi.org/10.1115/IPACK2005-73216

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Topics: Ball-Grid-Array packaging, Flip-chip, Flip-chip devices, Reliability, Solder joints, Heat sinks, Stress, Compression, Cycles, Electronic packages

Proceedings Papers

Modeling Melting Solder in System-in-Package Assembly

J. F. Zhao, J. F. Wang, C. Yang

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1455-1458, July 17–22, 2005

Paper No: IPACK2005-73237

DOI: https://doi.org/10.1115/IPACK2005-73237

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Topics: Manufacturing, Melting, Modeling, Solders, Stress, System-in-package

Proceedings Papers

Constitutive Relationship Development, Modeling and Measurement of Heat Stressing of Micro-SMD Assembly With Sn3.9Ag0.6Cu SAC Alloy

Qiang Xiao, William D. Armstrong, James M. Pitarresi, Satish C. Chaparala, Brian D. Rogeman, Bahgat G. Sammakia, Luu Nguyen

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1459-1470, July 17–22, 2005

Paper No: IPACK2005-73239

DOI: https://doi.org/10.1115/IPACK2005-73239

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Topics: Alloys, Creep, Heat, Manufacturing, Modeling, Surface mount devices, Bulk solids, Solders, Solder joints, Thermomechanics

Proceedings Papers

High Resolution Characterization of Materials Used in Packages Through Digital Image Correlation

V. Srinivasan, S. Radhakrishnan, X. Zhang, G. Subbarayan, T. Baughn, L. Nguyen

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1471-1478, July 17–22, 2005

Paper No: IPACK2005-73258

DOI: https://doi.org/10.1115/IPACK2005-73258

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Topics: Materials characterization, Resolution (Optics), Composite materials, Computer software, Displacement, B-splines, Fibers, High temperature, Mechanical testing, Packaging

Proceedings Papers

Hierarchical Modeling and Trade-Off Studies in Design of Thermal Interface Materials

X. Zhang, S. Kanuparthi, G. Subbarayan, B. Sammakia, S. Tonapi

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1479-1486, July 17–22, 2005

Paper No: IPACK2005-73259

DOI: https://doi.org/10.1115/IPACK2005-73259

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Topics: Design, Modeling, Tradeoffs, Particulate matter, Flat heat pipes, Thermal conductivity, Computer cooling, Fillers (Materials), Heat sinks, Percolation theory

Proceedings Papers

Mechanical Shock FE Modeling for ATCA Circuit Board Design

Frank Z. Liang, Larry M. Palanuk, Wade Hezeltine

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1487-1492, July 17–22, 2005

Paper No: IPACK2005-73274

DOI: https://doi.org/10.1115/IPACK2005-73274

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Topics: Design, Modeling, Printed circuit boards, Shock (Mechanics), Finite element model, Bricks, Design engineering, Displacement, Displacement measurement, Dynamic response

Proceedings Papers

Electronic Board/System Nonlinearity Characterization for Dynamic Analysis

Frank Z. Liang, Wade Hezeltine, Richard L. Williams

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1493-1497, July 17–22, 2005

Paper No: IPACK2005-73277

DOI: https://doi.org/10.1115/IPACK2005-73277

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Topics: Dynamic analysis, Dynamics (Mechanics), Finite element model, Lumber, Random vibration, Shock (Mechanics), Vibration tests

Proceedings Papers

Realization of Ultra-Wideband, High-Resolution TDR for Chip-Carrier Packages

Dong-Ho Han, Bao-Shu Xu, Myoung J. Choi, Jiangqi He, Scott Gardiner, Cliff Lee

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1499-1503, July 17–22, 2005

Paper No: IPACK2005-73291

DOI: https://doi.org/10.1115/IPACK2005-73291

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Topics: Resolution (Optics), Transmission lines, Ball-Grid-Array packaging, Calibration, Hardware, Reflection, Signals, Stress, Testing

Proceedings Papers

Full Band S-Parameter Generation Methodology for High Speed Package Interconnect Modeling

Xiangyin Zeng, Jiangqi He, Baoshu Xu

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1505-1508, July 17–22, 2005

Paper No: IPACK2005-73307

DOI: https://doi.org/10.1115/IPACK2005-73307

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Topics: Modeling, Skin effect, Electromagnetic spectrum, Signals, Circuits, Waves, Manufacturing, Time-domain analysis

Proceedings Papers

Thermal Simulation Benchmark of Graphic Module Under Installed, Operating Conditions

Fariborz Forghan, Gregory J. Kowalski, Mansour Zenouzi, Hameed Metghalchi

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1509-1521, July 17–22, 2005

Paper No: IPACK2005-73370

DOI: https://doi.org/10.1115/IPACK2005-73370

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Topics: Simulation, Temperature, Computer software, Steady state, Transients (Dynamics), Computers, Operating temperature

Proceedings Papers

Exploring the Possibility of Approximating Viscoelastic Response of Underfill Materials Through the Use of Appropriate Linear-Elastic Material Models

Shankar Ganapathysubramanian, Sandeep Sane, Richard Raymond Dimagiba, Biju I. Chandran

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1523-1528, July 17–22, 2005

Paper No: IPACK2005-73401

DOI: https://doi.org/10.1115/IPACK2005-73401

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Topics: Approximation, Computer simulation, Elastic analysis, Electronic packaging, Flip-chip, Manufacturing, Modeling, Packaging, Polymers, Risk assessment

Proceedings Papers

A Slim Sector Model for the Analysis of Fatigue Life of Fine Pitch Flip Chip Packages

Bing Zhao, Andrew A. O. Tay

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1529-1534, July 17–22, 2005

Paper No: IPACK2005-73418

DOI: https://doi.org/10.1115/IPACK2005-73418

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Topics: Fatigue analysis, Flip-chip packages, Finite element analysis, Creep, Flip-chip devices, Solders, Strips, Boundary-value problems, Computation, Computer technology

Proceedings Papers

Development and Application of Mechanical and Reliability Models for Connectors and Sockets

Raymond J. Iannuzzelli, Javad A. Seyyedi, Daniel L. Callahan

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1351-1358, July 17–22, 2005

Paper No: IPACK2005-73007

DOI: https://doi.org/10.1115/IPACK2005-73007

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Topics: Boundary-value problems, Computers, Design, Friction, Materials properties, Modeling, Packaging, Reliability, Stress

NARROW

Die Stress Analysis in Stacked Die Chip Scale Packages (SCSP)

A Thermo-Viscoelastic Analysis and Reliability Evaluation for a Single-Sided CSP

Thermal Characterization of Pulse-Activated Microelectronic Devices by Thermoreflectance-Based Surface Temperature Scanning

Simplified Network Based Modeling of Cold Plate in a CFD Environment

Modeling of Electron Transport in Thin Films With Quantum and Scattering Effects

Solder Joint Reliability Prediction of Flip Chip Packages Under Shock Loading Environment

A Characterization Study of Flip Chip Ball Grid Array (FCBGA) Dynamic Response and Performance on Peripheral Component Interconnect (PCI) Board Application

Solder Joint Reliability Challenges in Sub 1.00 mm Ball Pitch for Flip Chip Ball Grid Array

Modeling Melting Solder in System-in-Package Assembly

Constitutive Relationship Development, Modeling and Measurement of Heat Stressing of Micro-SMD Assembly With Sn3.9Ag0.6Cu SAC Alloy

High Resolution Characterization of Materials Used in Packages Through Digital Image Correlation

Hierarchical Modeling and Trade-Off Studies in Design of Thermal Interface Materials

Mechanical Shock FE Modeling for ATCA Circuit Board Design

Electronic Board/System Nonlinearity Characterization for Dynamic Analysis

Realization of Ultra-Wideband, High-Resolution TDR for Chip-Carrier Packages

Full Band S-Parameter Generation Methodology for High Speed Package Interconnect Modeling

Thermal Simulation Benchmark of Graphic Module Under Installed, Operating Conditions

Exploring the Possibility of Approximating Viscoelastic Response of Underfill Materials Through the Use of Appropriate Linear-Elastic Material Models

A Slim Sector Model for the Analysis of Fatigue Life of Fine Pitch Flip Chip Packages

Development and Application of Mechanical and Reliability Models for Connectors and Sockets

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