0
Technical Brief

Reduction of Voltage Harmonics in Solar Photovoltaic fed Inverter of Single Phase Stand Alone Power System

[+] Author and Article Information
S. Albert Alexander

Assistant Professor (Senior Grade)
Department of Electrical and Electronics Engineering,
Kongu Engineering College,
Perundurai, Erode,
Tamilnadu 638 052, India
e-mail: ootyalex@gmail.com

Manigandan Thathan

Principal
P. A. College of Engineering and Technology,
Pollachi, Coimbatore,
Tamilnadu 642 002, India
e-mail: manigandan_t@yahoo.com

1Corresponding author.

Contributed by the Solar Energy Division of ASME for publication in the JOURNAL OF SOLAR ENERGY ENGINEERING. Manuscript received September 27, 2013; final manuscript received March 11, 2014; published online May 13, 2014. Assoc. Editor: Santiago Silvestre.

J. Sol. Energy Eng 136(4), 044501 (May 13, 2014) (4 pages) Paper No: SOL-13-1280; doi: 10.1115/1.4027267 History: Received September 27, 2013; Revised March 11, 2014

In this paper, an optimal harmonic stepped waveform (OHSW) method is proposed to reduce the voltage harmonics available at the output of solar photovoltaic (SPV) fed fifteen level cascaded multilevel inverter (CMLI). This technique is used to solve the harmonic elimination equations based on stepped waveform analysis in order to obtain the optimal switching angles. The OHSW method considers the output voltage waveform as four equal symmetries in each half cycle and the magnitude of six numbers of harmonic orders is reduced. Simulations are carried out in Matlab/Simulink and a 3 kWp solar plant is implemented in hardware to show the effectiveness of the proposed system.

FIGURES IN THIS ARTICLE
<>
Copyright © 2014 by ASME
Your Session has timed out. Please sign back in to continue.

References

Dahidah, S. A., and Agelidis, V. G., 2008, “Selective Harmonics Elimination PWM Control for Cascaded Multilevel Voltage Source Converters: A Generalized Formula,” IEEE Trans. Power Electron., 23(4), pp. 1620–1630. [CrossRef]
Hagiwara, M., Nishimura, K., and Akagi, H., 2010, “A Medium-Voltage Motor Drive With a Modular Multilevel PWM Inverter,” IEEE Trans. Power Electron., 25(7), pp. 1786–1799. [CrossRef]
Daher, S., Schmid, J., and Antunes, F., 2008, “Multilevel Inverter Topologies for Stand-Alone PV Systems,” IEEE Trans. Ind. Electron., 55(7), pp. 2703–2712. [CrossRef]
Malinowski, M., Gopakumar, K., Rodriguez, J., and Pérez, M. A., 2010, “A Survey on Cascaded Multilevel Inverters,” IEEE Trans. Ind. Electron., 57(7), pp. 2197–2206. [CrossRef]
Kouro, S., Malinowski, M., Gopakumar, K., Pou, J., Franquelo, L. G., Wu, B., Rodriguez, J., Pérez, M. A., and Leon, J. I., 2010, “Recent Advances and Industrial Applications of Multilevel Converters,” IEEE Trans. Ind. Electron., 57(8), pp. 2553–2579. [CrossRef]
Zhao, J., He, X., and Zhao, R., 2010, “A Novel PWM Control Method for Hybrid Clamped Multilevel Inverters,” IEEE Trans. Ind. Electron., 57(7), pp. 2365–2373. [CrossRef]
Zambra, D. A. B., Rech, C., and Pinheiro, J. R., 2010, “Comparison of Neutral Point Clamped, Symmetrical, and Hybrid Asymmetrical Multilevel Inverters,” IEEE Trans. Ind. Electron., 57(7), pp. 2297–2306. [CrossRef]
Du, Z., Tolbert, L. M., and Chiasson, J. N., 2006, “Active Harmonic Elimination for Multilevel Converters,” IEEE Trans. Power Electron., 21(2), pp. 459–469. [CrossRef]
Chiasson, J. N., Tolbert, L. M., McKenzie, K. J., and Du, Z., 2005, “The Use of Power Sums to Solve the Harmonic Elimination Equations for Multilevel Converters,” EPE J., 15(1), pp. 19–27.
Aghdam, M. G. H., Fathi, S. H., and Gharehpetian, G. B., 2007, “Elimination of Harmonics in a Multilevel Inverter With Unequal DC Sources using the Homotopy Algorithm,” Proceedings of IEEE International Symposium on Industrial Electronics, June 4–7, pp. 578–583.
Kavousi, A., Vahidi, B., Salehi, R., Bakhshizadeh, M. K., Farokhnia, N., and Fathi, S. H., 2012, “Application of the Bee Algorithm for Selective Harmonic Elimination Strategy in Multilevel Inverters,” IEEE Trans. Power Electron., 27(4), pp. 1689–1696. [CrossRef]
Taghizadeh, H., and Hagh, M. T., 2010, “Harmonic Elimination of Cascade Multilevel Inverters With Non Equal DC Sources using Particle Swarm Optimization,” IEEE Trans. Ind. Electron., 57(11), pp. 3678–3684. [CrossRef]
Santos, E. J. P., and Barybin, A. A., 2005, “Stepped Waveform Synthesis for Reducing Third Harmonic Content,” IEEE Trans. Instrum. Meas., 54(3), pp. 1296–1302. [CrossRef]
Liu, Y., Hong, H., and Huang, A. Q., 2009, “Real Time Calculation of Switching Angles Minimizing THD for Multilevel Inverters With Step Modulation,” IEEE Trans. Ind. Electron., 56(2), pp. 285–293. [CrossRef]
Liu, Y., Hong, H., and Huang, A. Q., 2009, “Real Time Algorithm for Minimizing THD in Multilevel Inverters With Unequal or Varying Voltage Steps Under Staircase Modulation,” IEEE Trans. Ind. Electron., 56(6), pp. 2249–2258. [CrossRef]
Fei, W., Du, X., and Wu, B., 2010, “A Generalized Half Wave Symmetry SHE-PWM Formulation for Multilevel Voltage Inverters,” IEEE Trans. Ind. Electron., 57(9), pp. 3030–3038. [CrossRef]
Wang, J., and Ahmadi, D., 2010, “A Precise and Practical Harmonic Elimination Method for Multilevel Inverters,” IEEE Trans. Ind. Appl., 46(2), pp. 857–865. [CrossRef]

Figures

Grahic Jump Location
Fig. 1

Fifteen level solar fed CMLI

Grahic Jump Location
Fig. 2

Seven stage fifteen level output voltage waveform

Grahic Jump Location
Fig. 3

Quarter wave symmetry waveform for 15 levels

Grahic Jump Location
Fig. 4

Fifteen level output voltage waveform with OHSW

Grahic Jump Location
Fig. 5

FFT Analysis for the output waveform with OHSW

Grahic Jump Location
Fig. 6

Comparison graph for harmonic order magnitudes

Grahic Jump Location
Fig. 8

Output voltage waveform and FFT analysis

Tables

Errata

Discussions

Some tools below are only available to our subscribers or users with an online account.

Related Content

Customize your page view by dragging and repositioning the boxes below.

Related Journal Articles
Related eBook Content
Topic Collections

Sorry! You do not have access to this content. For assistance or to subscribe, please contact us:

  • TELEPHONE: 1-800-843-2763 (Toll-free in the USA)
  • EMAIL: asmedigitalcollection@asme.org
Sign In